Intellivision service manual

Fix Your Stuff Community Store. Intellivision Repair. Show Other Languages. Intellivision Repair The Intellivision is a video game console released by Mattel in Author: thelectronicnub and 5 other contributors. Create a Guide I Have This. Support Questions Ask a Question. Background and Identification. Also contains a second bus for interfacing to the STIC and its memory bus.

This is one of them. This x 8-bit ROM stores the built-in graphics for the Intellivision. This includes address decode, read strobe and write strobe signals. These two RAMs combine together to provide bytes of programmable graphics patterns for games. This provides usable words of scratchpad RAM. In order to simplify the address decoding logic, the upper 16 bytes of this RAM's address space have been replaced with the Programmable Sound Generator's address space instead.

The lower 4 bits specify one of the Inty's familiar 16 colors. The 5th bit is used to specify other NTSC signal states such as blanking, colorburst, etc. This is the sound chip.

It provides 3 tone voices and one noise channel that can be mixed into the tone channels. It also provides two 8-bit bidirectional ports which are used for the Intellivision's controller pads. During this stage, no device is active on the bus. DB0 through DB15 are allowed to float, with their previous driven value fading away during this phase. Then, during this phase, the currently selected device responds with its data on the bus, and at the end of this phase, all devices should latch this address as the address for the next memory access DTB , DW , or DWS phases.

The CPU asserts nothing during this phase -- rather, it expects the currently addressed device to inform the rest of the machine of the address for the next access. This bus phase is entered during interrupt processing, after the current program counter has been written to the stack. The CPU then moves this address into the program counter and resumes execution.

This phase is entered during a read cycle. During this phase, the currently addressed device should assert its data on the bus. The CPU then reads this data. During this phase, the CPU asserts the address for the current memory access. All devices on the bus are expected to latch this address and perform address decoding at this time. They always occur together on adjacent cycles, with data remaining stable on the bus across the transition from DW to DWS.

During these phases, the data being written is available for external memories to latch. The CPU enters this bus phase on the first cycle of interrupt processing. During the phase, the CPU places the current stack pointer value on the bus as it prepares to "push" the current program counter on the stack. It uses this bus phase to trigger a special bus-copy mode as well as for latching the current address. CPU asserts address of the Instruction or Data to read. Devices should latch the address at this time and perform address decoding.

CPU asserts address of the Data to write. The CPU deasserts the bus, and no other bus activity occurs during this cycle. The addressed device asserts its data on the bus. The CPU asserts the data to be written. The addressed device can latch the data at this time, although it is not necessary yet, as the data is stable through the next phase. The CPU continues to assert the data to be written. The Intellivision Library contains many useful images of PlayCable materials, including scans of the entire user manual , the flyer also shown below , and numerous images of the hardware.

The Intellivision Gumbo site has been kind enough to allow me to use the images of a PlayCable flyer for this site. So, here it is! Note the prominence of the number 16 on the back page. A rather humorous error here: a 16 K microprocessor? Hmm, perhaps they meant 16 bit? After all, the PlayCable itself was limited in that it could only store games up to 4K in size. This was one of the factors that led to its demise, according to the Intellivision Productions folks.

In addition to flyers, special versions of game manuals were also printed and sent to customers. To store the manuals and, presumably, overlays, a box was provided. It should be expected that some kind of service manual existed, and possibly other documentation or packaging. Anyone who finds such materials and is willing to share information or images, please send a message! As mentioned previously, the PlayCable unit was modeled after the original Master Component in its appearance.

It also has its own internal transformer to step down V AC. I haven't probed the guts of my unit yet to see what voltages it produces. Given the information from the BSRs, one can also conclude that there's a ROM containing the program loader software as well as some kind a demodulator used to decode the software data from the TV signal - similar in concept to how our cable modems work today, but without the ability to upload data.

There are two images showing what the PlayCable unit's shell looked like. Both the 'Jerrold' and 'General Instrument' units are known to exist. The Jerrold version is also the unit pictured in an Electronic Games article. Is one more difficult to find than the other?